Design Engineer

  • Full Time
  • Yokneam
  • Posted 4 years ago

Marvell Israel

Marvell Israel is R&D center of Communication Switches and System-on-Chip (SoC) products and employs more than 650 people at two sites in Yokne’am and Petah Tikva. The company’s clients include some of the most advanced technology firms in the world, such as, Samsung, Intel, Microsoft, Google, Ericsson, ZTE, Huawei, H3C, Cisco, Fujitsu, HP, Dell, Hitachi, Sony, Panasonic, Toshiba, Western Digital, Baidu, China Mobile, and China Telecom.


The candidate will be responsible of design and /or integration of the DDR block in our future devices. He / she will work with the architecture team on definition, with the verification team on test plan,  with backend and project team on implementation and supporting device integration and verification and later on silicon validation activities.

The candidate will work as part of a team and should have relevant capabilities and be accountable for his responsibilities and independent in his work.

Location: Yokneam



1 – 3 years of experience in ASIC front-end design.


IP and especially DDR experience

Verification experience.

UVM knowledge.


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