Design Engineer

Marvell Israel

Marvell Israel is R&D center of Communication Switches and System-on-Chip (SoC) products and employs more than 650 people at two sites in Yokne’am and Petah Tikva. The company’s clients include some of the most advanced technology firms in the world, such as, Samsung, Intel, Microsoft, Google, Ericsson, ZTE, Huawei, H3C, Cisco, Fujitsu, HP, Dell, Hitachi, Sony, Panasonic, Toshiba, Western Digital, Baidu, China Mobile, and China Telecom.


  • Work with PD and ARC teams get the definition for the device, write the uArc and implement the needed design.
  • Gain system understanding and knowledge in the switch architecture
  • Ability to work with the different IP teams get there deliveries and integration guide line and implement it
  • Learning MISL integration tools (wire-up ,PIT, Defacto) and use it for chip integration and macro partitioning
  • Ability to support the BE team with timing analysis ,floor plan guideline adjustments and reviews



Technical knowledge

Knowledge in Verilog and System Verilog

System view oriented – manages to see the full picture

Integration experience – advantage

Good understanding the switching packet walk through – advantage

I/O and package knowledge – advantage

Experience in design IP or Full chip of at least 5 to 8 years

Personal skills

Complex situation handling  – time management and priority management

Team work oriented – Communicative, shares his knowledge and will to learn from others, good personal relation and working relation in a team.

Independent Quality driven – understands the definition, drive high quality and ability for self-check

Stability – willing to invest for long period.

Please send CV to



To apply for this job email your details to

Apply using webmail: Gmail / AOL / Yahoo / Outlook